1. Field of the Invention
The present invention relates to a printed circuit board in which an interposer of a semiconductor device and a printed wiring board are soldered to each other, and a stacked semiconductor device in which interposers of semiconductor devices are soldered to each other.
2. Description of the Related Art
In recent years, as electronic equipment achieves greater functionality, a semiconductor package as a semiconductor device is more and more required to have a structure, which can cope with an increase in number of terminals, and is advantageous for miniaturization. As an example of such a semiconductor package, a ball grid array (BGA) type or land grid array (LGA) type semiconductor package is known.
In a semiconductor package of this type, electrodes are arranged utilizing a bottom surface region of an interposer (package substrate). This structure enables securement of a larger number of terminals and reduction in mounting space.
In particular, in an LGA type semiconductor package, a land formed on a semiconductor package and a land formed on a printed wiring board can be joined to each other without using a solder ball. Therefore, a mounting step can be simplified, and a height of the entire semiconductor package after the mounting can be made smaller, which is advantageous in thinning. Accordingly, such an LGA type semiconductor package is expected to be used in various products in the future. In general, a height of an LGA type semiconductor package after the mounting with respect to a printed wiring board is from about 100 μm to about 300 μm.
A manufacturing method of mounting an LGA type semiconductor package on a printed wiring board such as a motherboard or an interposer of another semiconductor package is as follows. Solder paste is printed on a land formed on the printed wiring board. Then, the semiconductor package is mounted on the printed wiring board using a mounting apparatus such as a mounter. After that, the printed wiring board having the semiconductor package mounted thereon is introduced into a reflow furnace to heat and melt the solder paste, thereby electrically connecting a land on the interposer of the semiconductor package and a land formed on the printed wiring board to each other via solder.
In such a manufacturing method of mounting an LGA type semiconductor package on a printed wiring board, the lands are joined together only via the printed solder paste, and thus, it is not necessary to mount a solder ball on the semiconductor package, which enables simplification of the process. Further, the used solder has only a small volume, and thus, the formed solder has only a small height, which is advantageous in thinning.
Ordinarily, in a printed wiring board and a semiconductor package in a reflow step, warpage occurs when heated under the influence of thermal expansion of a wiring pattern stacked therein. In particular, an interposer of a semiconductor package has a semiconductor element mounted thereon having a linear expansion coefficient which is lower than that of the interposer, and thus, warpage is liable to occur in such a manner that a surface opposite to a surface having the semiconductor element mounted thereon bulges.
In an LGA mounting structure, the solder has a small height, and thus, when warpage occurs in the interposer as described above, at a portion where a gap between the interposer of the semiconductor package and the printed wiring board becomes smaller, the solder is flattened more, which makes a bridge more liable to occur. Therefore, in order to prevent a solder bridge, it is necessary to make the solder less liable to be flattened even when warpage occurs in the interposer of the semiconductor package and in the printed wiring board.
In Japanese Patent Application Laid-Open No. 2008-124363, as a method of making solder less liable to be flattened, there is described a technology which uses dummy solder in which a dummy land is formed only on one substrate of an interposer of a semiconductor package and a printed wiring board so that the dummy land is not electrically joined to another substrate.